The C74-6502 is a homemade implementation of the venerable MOS 6502 microprocessor. The 6502 was revolutionary in its time, and widely adopted in early home computers and gaming consoles. This design is a microprogrammed, discrete-component 6502, an architecture that was prevalent in 1970s-era mainframe computers which pre-dated modern microprocessor technology.
The C74-6502 is plug-in compatible with a wide variety of 6502 systems, including classic computers from Commodore and Apple, as well as modern systems based around the 65C02 microprocessor still in production today. This CPU runs at speeds of up to 20MHz (vs. 1 MHz for the original MOS 6502).
The MOS 6502 microprocessor is legendary in the industry for having helped launch the personal computer revolution. Its design delivered ground-breaking performance for the price, and made possible such iconic home computers and gaming systems as the Apple II, the Commodore 64, the VIC 20, the Atari 2600 and the Nintendo Entertainment System (NES). As a result, millions of people’s first experience with a computer of any kind was with one powered by the innovative 6502.
For many enthusiasts, understanding the inner workings of pioneering devices like the 6502 is a long-held dream; and an opportunity to gain a unique perspective into the fundamental principles of CPU design. There is a growing community of enthusiasts around the world who have devoted themselves to making CPUs of various descriptions. The C74-6502 is one such example.
This CPU is a microprogrammed, discrete-component design. In contrast to modern single-chip microprocessors, discrete-component CPUs consist of hundreds of relatively simple individual building-block Integrated Circuits (ICs), laid out on large Printed Circuit Boards (PCBs) and connected together by thousands of individual connections (traces).
The C74-6502 was designed by hobbyists working at home, soldered by hand and built using simple tools and techniques. It consists of some 200 ICs and 4,000 individual solder points laid out on two sister PCBs.
After two years of work, finally it was time for the ultimate test of compatibility: would the C74-6502 be able to replace the microprocessor inside a genuine vintage 6502 computer? A 1983 VIC-20 is a fitting machine to use for this test. The VIC-20 is an iconic device — it set the standard for early home computers and was the first computer of any kind to sell over a million units.
Successfully replacing this machine’s MOS 6502 microprocessor would mean that the C74-6502 is functionally equivalent to the original, and a deserving bearer of the 6502 designation. A photo-blog below documents the occasion:
C74-6502 Ready For DutyVIC 20’s MOS 6502 MicroprocessorC74-6502 Transplant CompleteVictory! — It WorksProgramming With The C74-6502Playing “Frogger” — A ClassicTesting With Other GamesC74-6502 Pays Homage To The Original
The Commodore 64 proved to be a next-level challenge for the C74-6502. C64 programmers are notorious for exploiting every nuance of the machine’s hardware in pursuit of new and exciting effects. As a result, many games and demos on this machine depend on subtle details in the CPU’s function and timing. To run the C64 software catalogue, the C74-6502 would need to replicate the operation of the MOS 6510 microprocessor in meticulous detail.
Doing so required extensive testing, and several careful modifications to the prototype boards. Below is one such modification, worked out on a scratch-pad, and used to correct the action of an NMI when interrupting an IRQ already in progress:
Patch: NMI either hijacks an IRQ, or waits up to four cycles
Despite enduring several such patches and fixes, in the end the C74-6502 was able to run a wide variety of C64 games; and the prototype boards performed like a champ!
The C74-6502 ran every game tested!
Over seventy-five games were selected from various “best of” lists (along with several demos, utilities and cartridges) to assemble a representative test suite of both complex and popular software. The C74-6502 ran them all without a problem. (See the complete list of currently verified titles here).
For all practical purposes, the C74-6502 appears to be fully “plug-compatible” with the original NMOS 6502 and 6510 CPUs. Please feel free to suggest any games or demos which might exercise the CPU in unique ways. It will be interesting to see whether any compatibility issues remain undiscovered.
The C74-602 is a speedster. It’s native 20MHz rated clock-rate is higher than is traditionally possible with homemade CPUs. This performance is especially noteworthy given that the C74-6502 is a complete and cycle-accurate implementation of the 6502 instruction-set. There are no artificial wait-states, cycle-stretching, or other corners cut in this design. The C74-6502 owes it’s performance principally to the use of fast 74AC logic and an efficient Microcode Pipeline design (among other optimizations).
Speed tests for the C74-6502 were carried out using the comprehensive Klaus Dormann 6502 Test Suite. This ensured that all paths through the CPU’s circuitry were adequately exercised, and the CPU was left to run for several hours at room temperature to confirm stable operation. The maximum clock frequency recorded was 21MHz at 5.5V.
The Frequency Counter readout below shows this measurement, taken while the CPU was executing at top speed without skipping a beat.
Follow the progress of a new Next Generation TTL 6502 targeting a 100MHz clock-rate!
An often repeated refrain is that homebuilt CPUs are constrained to single-digit clock-rates by limitations inherent in discrete-component design. But we know that’s not true. The C74-6502 achieved a 20MHz clock-rate while still being a full-fledged cycle-accurate 6502. It’s worth asking, then, could a humble TTL 6502 reach that rarified air above 100MHz? It’s not clear such a thing is possible, but the challenge is on!
See here a discussion of an advanced pipeline design for a 6502. This type of architecture is commonly used on RISC CPUs (like ARM) but is not often seen in older ones like the 6502. This design includes a 7-stage instruction pipeline that aims to maximize concurrency within the CPU and thereby to reduce the average number of cycles per instruction (CPI) on execution.
The discussion includes overviews of several advanced CPU design techniques, as these apply specifically to the 6502. These include: