The C74 Project aims to build a Commodore C64 using only 7400 Series discrete components. The C74-6502 CPU is the first step in this larger effort, and it took over three years to complete. Other ICs in the C64 include the notoriously complex VIC and SID chips, among others, and these are easily as difficult to render in discrete logic as the CPU itself. This project is certain to be a long road.
Since the project’s inception, a number of TTLers have begun independent efforts which in one way or another represent steps along this road. There are TTL 6502s, CIAs, as well as exploratory work on the VIC and SID chips. Below is a sampling of projects underway:
- 74HCT6526 by Dani Molina: “The goal of this project is to build a drop-in replacement for the MOS6526, also know as CIA, used in many home computers by Commodore.”
- DIA, Another 6526 by ttlworks: “schematics and PCB layouts for what I think might be a 20MHz TTL implementation of the 6526″
- TTL VIC-II, some ideas by ttlworks: “This thread is for collecting some ideas\concepts about how to build something like a “TTL implementation of the VIC-II” as a support for the C74 project“.
- Understanding SID by drfiemost and ttlworks: “reverse-engineering (parts of) the SID chip”
- C64 8701R2 clock generator chip dissected: by ttlworks: “the innards of the 8701R2 (revision 2) clock generator chip (used in the C64)“
- Yet Another TTL 6502 by Arlet Ottens: “Make it educational so that anyone interested in CPU design or the 6502 can study the design”.
- My 6502 by vfxsoup
- Building the C74-6502 by Josh Bensadon: “Building a discrete logic 6502 CPU”
- Ideas for a faster TTL CPU/6502 related: “The aim is just to make up an odd collection of ideas (whether they make sense or not) for breaking that 20MHz “sonic barrier”.
- Pipelining The 6502 by Drass: “The basic idea is that a seven-stage pipeline can support the various 6502 addressing modes (including RMW instructions) in one pass“.
- C64 PLA Dissected By Thomas ’skoe’ Giesel is a pre-existing effort but nevertheless relevant here
If you are starting a new project, or are otherwise interested in further developing the ideas presented above, let us know. We would love to hear from you!
Acknowledgements For “OurCPU”
The C74-6502 project began as a novice attempt to build a working TTL 6502. From the start, the design relied on Dieter Mueller’s Multiplexer ALU and BCD circuitry, as well as a myriad of articles and information found on 6502.org. The design advanced significantly when 6502.org forum members ttlworks (Dieter Mueller) and Dr Jefyll (Jeff Laughton) jumped in to help. The project then evolved as a team effort – hence “OurCPU”.
I cannot thank Dieter and Jeff enough for their generous collaboration, expert mentoring, and good humour — I am indebted to them both. A special thanks as well to all the folks at 6502.org who together make up such a welcoming and supportive community.
- Project Forum Thread (on 6502.org)
- Dieter Mueller (ttlworks on 6502.org)
- Jeff Laughton (Dr Jefyll on 6502.org)
- Ed Spittles (BigEd on 6502.org)
- Garth Wilson (GARTHWILSON on 6502.org)
- BDD’s POC1 and POC2
- Bruce Clarke 6502 Decimal Mode, V Flag, 65C02 Opcodes
- Klaus Dormann’s 6502 Test Suites
- Arlet Ottens 6502 Verilog Core
- Visual 6502
- Unintended Opcodes – No More Secrets