The C74-6502 is a cycle-accurate, pin-compatible implementation of the MOS 6502 microprocessor rendered in discrete logic. It may be configured to operate natively as a 6502, a 6510, or a 65C02 variant of the classic processor. An optional card adds support for a 24-bit address space (16 Mb), additional 65816 opcodes and a built-in SPI interface.
Download the draft PDF datasheet: C74-6502 Draft Datasheet
Specifications
- Cycle-accurate, pin-compatible 6502, 6510 & 65C02 operation
- Implements all 6502 and 65C02 instructions and functions, including Decimal Mode
- Supports NMOS 6502 Undocumented Opcodes
- Includes an on-board 6-bit, bi-directional I/O port compatible with the MOS 6510 MPU
- Custom 40-Pin Host Socket Adaptor
- Compatible with TTL or CMOS Host Systems
- Auxiliary Power Supply Connections
- 0 to 20MHz clock-rate
- Operating Voltage: 5V
- Current Draw: 130mA at 1MHz, 750mA at 20MHz
- Maximum clock-rate: 21MHz, at 5.6V, 1A current draw
Optional Card Enhanced Features
- 24-bit address bus
- Additional 65816 instructions and addressing modes
- Software-selectable instruction-sets
- Built-in SPI interface, custom SPI Opcode transfers 8 bits in 8 cycles
Compatibility Tests
- Commodore VIC-20: full plug-in compatibility verified with a variety of programs, games and cartridges.
- Commodore C64: full plug-in compatibility verified with a variety of programs, games and cartridges.
- C74-SBC: functional and speed tests completed on a purpose-built WDC 65C02 Single Board Computer (SBC).
See details of Compatibility Testing.
C74-6502 CPU 